1. Field of the Invention
The present invention relates to a processor having a bank structure, and it particularly relates to a processor capable of handling multiple interrupts.
2. Description of the Prior Art
The number of general-purpose registers which can be used in a central processing unit (CPU) of a microprocessor is usually limited due to a size of a semiconductor chip. Therefore, there is available a microprocessor having a bank structure.
A bank is a collection of general-purpose registers. The general-purpose registers are mainly used for an arithmetic operation. In general, general-purpose registers of a bank are stored in a space (called a bank RAM) of a predetermined size within a random access memory (RAM) region. A specific bank RAM can be selected from a plurality of bank RAMs to be a general-purpose RAM.
In a conventional microprocessor having a bank structure, switching of the banks is equivalent to having a plurality of general-purpose registers. For example, referring to FIG. 1, when there are four general-purpose registers 101 in each bank and there are a total of 256 banks in the microprocessor, it is equivalent to there being 4.times.256=1024 registers.
There exists a register called a bank pointer for specifying a bank number thereof when there are a plurality of banks. By changing the bank number, a content stored in another bank can be accessed.
In a microprocessor system having the conventional bank structure, there can be considered (1) a stack memory or (2) a general-purpose register in which the bank number in use can be saved when an interrupt occurs. In both the stack memory and general-purpose register configurations, even if the bank is switched due to an interrupt routine, the bank number prior to occurrence of the interrupt is read after the interrupt routine is completed so as to return to an original bank by reading the bank number.
In the microprocessor system having the conventional bank structure wherein the bank number is saved to the stack memory, in the event of an interrupt, the bank number must be written to a stack memory connected to an external bus of the microprocessor and read from the stack memory when returning from an interrupt process. This writing to and reading from the external stack memory via an external bus is very time consuming.
On the other hand, some microprocessor systems have a conventional bank structure wherein the bank number for a bank which has been used is saved to a general-purpose register after the bank is switched in the event of the interrupt. Compared to a case where the bank number is saved to the stack memory, saving to the general-purpose register is faster since a slow access to the external bus is not necessary.
However, when an interrupt process is carried out using a general-purpose register to store the bank number, there is a limit to the general-purpose registers which can be used for the interrupt process since a general-purpose register containing a bank number as return data cannot be used to execute the interrupt process. If a general-purpose register with a return data is needed, the return bank number can be saved to the stack memory, thereby yielding slower processing than if the stack memory was used from the beginning.